uses a register and some combinational logic
after reset, assert trigger. Use sel bits to get result
Something to sequence nrst, ring_en, trig and the sel bits
| # | Input | Output | 
|---|---|---|
| 0 | clock | out[0] | 
| 1 | nreset | out[1] | 
| 2 | trig | out[2] | 
| 3 | sel[0] | out[3] | 
| 4 | sel[1] | out[4] | 
| 5 | sel[2] | out[5] | 
| 6 | ring_en[0] | out[6] | 
| 7 | ring_en[1] | out[7] |