This is a minimal SHA-256 hash core implemented in a single-cycle-round architecture. TODO: expand on this
TODO: write instructions
No external hardware is needed besides some method of interacting with the bus to transfer commands and data.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | addressed register bit 0 | ready | data bit 0 |
| 1 | addressed register bit 1 | IO read/write selected | data bit 1 |
| 2 | addressed register bit 2 | todo0 | data bit 2 |
| 3 | addressed register bit 3 | todo1 | data bit 3 |
| 4 | addressed register bit 4 | todo2 | data bit 4 |
| 5 | addressed register bit 5 | todo3 | data bit 5 |
| 6 | IO read/write select | todo4 | data bit 6 |
| 7 | IO clock | todo5 | data bit 7 |